As a phase comparator to compare the phases of two binary signals, a method using an exclusive-OR circuit is well known. In this case, when two binary signals are supplied to two input ports of the exclusive-OR circuit, a duty cycle (pulse width) in a binary output signal changes in proportion to a phase difference of the two input signals. Accordingly, the duty cycle is averaged by an integrator and an analog signal based on the phase difference is extracted.
The exclusive-OR circuit can detect the phase difference in case each frequency of two input signals are equal and a range of the phase difference is “−n˜n”. In short, the exclusive-OR circuit can not correctly detect the phase difference at operation of frequency step. Accordingly, if the exclusive-OR circuit is used as the phase comparator and an oscillation frequency of voltage control oscillator is controlled by the detected phase difference, i. e., if PLL (phase locked loop) circuit of this type is composed, a settling time (a time required for initial drop) becomes long.
On the other hand, the phase comparator whose range of phase difference is expanded as “−2π˜2π” is known. This phase comparator operates so that output value of phase difference maintains “−2π” or “2π” in case the phase difference is over the range of “−2π−2π”. Therefore, it is expected that this phase comparator correctly operates at operation of frequency step. However, even if the range of phase difference is expanded, the range is limited as “−2π−2π”.
Furthermore, if PLL circuit is composed using above-mentioned phase comparator, it is necessary that the frequencies of the two input signals to the phase comparator are almost equal. As a result, a free degree of component of PLL circuit is greatly reduced. Furthermore, if a predetermined frequency is generated by a PLL circuit in which a divider is inserted in a loop, an output frequency is limited to integral times as much as frequency of reference signal.
In Japanese Patent Disclosure (Kokai) PH5-300014, a phase comparator applicable to the range of phase difference over “−2π˜2π” is disclosed. However, in this phase comparator, a complicated analog circuit element, such as a reference signal generator of saw tooth signal or a differential phase generator of reference signal, is necessary. As a result, the circuit scale is very large and the cost greatly increases.
As mentioned-above, in the known phase comparator, a phase difference of two input signals whose frequencies are different is not detected. Especially, in case of composing a PLL circuit, it is necessary that frequencies of two input signals to the phase comparator are almost equal. As a result, the free degree of composition of PLL circuit becomes narrow, and a free degree of output frequency from PLL circuit is low.
Furthermore, in the phase comparator applicable to the case that the range of phase difference is over “−2π˜2π” and frequencies of two input signals are different, the circuit scale becomes large and the cost becomes high.